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 BUK98150-55A
TrenchMOSTM logic level FET
M3D087
Rev. 02 -- 25 March 2002
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM1 technology, featuring very low on-state resistance. Product availability: BUK98150-55A in SOT223 (SC-73).
2. Features
s s s s TrenchMOSTM technology Q101 compliant 150 C rated Logic level compatible.
3. Applications
s Automotive and general purpose power switching: x 12 V and 24 V loads x Motors, lamps and solenoids.
4. Pinning information
Table 1: Pin 1 2 3 4 Pinning - SOT223 (SC-73), simplified outline and symbol Description gate (g)
4
Simplified outline
Symbol
d
drain (d) source (s) drain (d)
MBB076
g s
1
Top view
2
3
MSB002 - 1
SOT223 (SC-73)
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tsp = 25 C; VGS = 5 V Tsp = 25 C VGS = 5 V; ID = 5 A VGS = 4.5 V; ID = 5 A VGS = 10 V; ID = 5 A Typ 128 116 Max 55 5 8 150 150 161 137 Unit V A W C drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
m m m
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IDR IDRM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) peak reverse drain current Tsp = 25 C Tsp = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 5 A; VDS 55 V; VGS = 5 V; RGS = 50 ; starting Tj = 25 C Tsp = 25 C; VGS = 5 V; Figure 2 and 3 Tsp = 100 C; VGS = 5 V; Figure 2 Tsp = 25 C; pulsed; tp 10 s; Figure 3 Tsp = 25 C; Figure 1 RGS = 20 k Conditions Min -55 -55 Max 55 55 15 5 3 22 8 +150 +150 5 22 31 Unit V V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness EDS(AL)S non-repetitive avalanche energy
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
2 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
120 Pder (%) 80
03aa17
5 ID (A) 4
03nh98
3
2 40 1
0 0 50 100 150 Tsp (C) 200
0 25 50 75 100 125 150 Tsp (C)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 4.5 V
Fig 1. Normalized total power dissipation as a function of solder point temperature.
Fig 2. Continuous drain current as a function of solder point temperature.
102
03na29
ID (A)
Limit RDSon = VDS/ID
tp = 10 s
10
100 s
1 DC
1 ms
10 ms 100 ms 10-1 1 10 VDS (V) 102
Tsp = 25 C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
3 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
7. Thermal characteristics
Table 4: Symbol Rth(j-sp) Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to solder point thermal resistance from junction to ambient Conditions Figure 4 Min Typ 70 Max 15 Unit K/W K/W
7.1 Transient thermal impedance
102 Zth(j-sp) (K/W) 10 = 0.5 0.2 0.1 1 0.05 0.02 10-1 single shot
tp P
03na30
=
tp T
t T
10-2 10-6 10-5 10-4 10-3 10-2 10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
4 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
8. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 150 C Tj = -55 C IDSS drain-source leakage current VDS = 55 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 5 V; ID = 5 A; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 4.5 V; ID = 5 A; VGS = 10 V; ID = 5 A; Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time VDD = 20 V; RL = 3.3 ; VGS = 5 V; RG = 10 ; VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDD = 44 V; ID = 5 A; Figure 14 5.3 1.0 2.8 240 40 25 8 57 16 13 320 48 34 nC nC nC pF pF pF ns ns ns ns 128 116 150 276 161 137 m m m m 0.05 2 10 500 100 A A nA 1 0.6 1.5 2 2.3 V V V 55 50 V V Min Typ Max Unit Static characteristics
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
5 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
Table 5: Characteristics...continued Tj = 25 C unless otherwise specified Symbol VSD trr Qr Parameter source-drain (diode forward) voltage reverse recovery time recovered charge Conditions IS = 5 A; VGS = 0 V; Figure 15 IS = 5 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V Min Typ 0.85 24 30 Max 1.2 Unit V ns nC Source-drain diode
25 ID (A) 20 8 10
03na26
140 RDSon
03na24
VGS = 6 V 5
(m) 120
15 4 10
100
3 5
0 0 2 4 6
2.2 8 10 VDS (V)
80 0 5 10 VGS (V) 15
Tj = 25 C; tp = 300 s
Tj = 25 C; ID = 5 A
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values.
320 VGS = 3 V RDSon (m) 240 3.8 3.2 3.4 3.6
03na27
2.4 a 1.8
!== &
1.2
4 160 5 10 80 2 6 10 ID (A) 14
0.6
0 -60 0 60 120 Tj ( C)
o
180
Tj = 25 C
R DSon a = --------------------------R DSon ( 25 C )
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
9397 750 09435
Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
6 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
2.5 VGS(th) (V) 2 max
03aa33
10-1 ID (A) 10-2
03aa36
typ 1.5 min 1
10-3
min
typ
max
10-4
0.5
10-5
0 -60 0 60 120 Tj (C) 180
10-6 0 1 2 VGS (V) 3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of junction temperature.
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
6 gfs (S) 4
03na25
600 C (pF) Ciss Coss
03na28
400 Crss
2
200
0 0 2 4 6 8 ID (A) 10
0 10-2 10-1 1 10 VDS (V) 102
Tj = 25 C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
7 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
6 ID (A)
03na21
5 VGS (V) 4 VDD = 14 V
03na23
4 3
VDD = 44 V
Tj = 150 C 2
2
1 Tj = 25 C 0 0 1 2 3 VGS (V) 4 0 0 2 4 QG (nC) 6
VDS = 25 V
Tj = 25 C; ID = 5 A
Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values.
20 IS (A) 15
03na22
10
5
Tj = 150 C Tj = 25 C
0 0.0 0.4 0.8 1.2 VSD (V) 1.6
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
8 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
9. Package outline
Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223
D
B
E
A
X
c y HE b1 vMA
4
Q A A1
1
e1 e
2
bp
3
wM B detail X
Lp
0
2 scale
4 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.8 1.5 A1 0.10 0.01 bp 0.80 0.60 b1 3.1 2.9 c 0.32 0.22 D 6.7 6.3 E 3.7 3.3 e 4.6 e1 2.3 HE 7.3 6.7 Lp 1.1 0.7 Q 0.95 0.85 v 0.2 w 0.1 y 0.1
OUTLINE VERSION SOT223
REFERENCES IEC JEDEC EIAJ SC-73
EUROPEAN PROJECTION
ISSUE DATE 97-02-28 99-09-13
Fig 16. SOT223 (SC-73).
9397 750 09435 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
9 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
10. Soldering
7.00 3.85 3.60 3.50 0.30 solder lands 1.20 (4x) 4 solder resist occupied area solder paste
7.40
3.90 4.80 7.65
1
2
3
1.20 (3x) 1.30 (3x) 5.90 6.15
MSA443
Dimensions in mm.
Fig 17. Reflow soldering footprint for SOT223 (SC-73).
11. Revision history
Table 6: 02 Revision history CPCN Description Product data; second version, supersedes Rev 01 of 20001003. Modifications:
Rev Date 20020325
* * * *
01 20001003 -
Gate-source voltage maximum increased from 10 to 15 V in limiting values table. Rth(j-sp) maximum decreased from 20 K/W to 15 K/W in thermal characteristics table. Switching speed measurements updated in characteristics table. Total power dissipation, peak drain current, peak reverse drain current, and non-repetitive avalanche energy figures updated in quick reference data and limiting values.
Product specification; initial version.
9397 750 09435
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
10 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
12. Data sheet status
Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] [2]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
13. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
14. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 09435
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 02 -- 25 March 2002
11 of 12
Philips Semiconductors
BUK98150-55A
TrenchMOSTM logic level FET
Contents
1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
(c) Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 March 2002 Document order number: 9397 750 09435


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